Designing of a reversible fault tolerant booth multiplier
Keywords:Reversible logic circuit, Fault tolerant circuit, Reversible booth multiplier, Quantum cost, Garbage output
Conventional logic dissipates more power by losing bits of information whereas reversibility recovers bit loss from the unique input-output mapping. This paper presents the design of a reversible fault tolerant booth multiplier which can multiply both signed and unsigned numbers. The proposed circuit tolerant designed using only fault tolerant reversible gates. Thus the entire scheme inherently becomes fault tolerant. Several theorems on the numbers of gates, garbage outputs, quantum cost of the proposed design have been presented to show the efficiency of the design. The result analysis shows that the proposed design is optimized in terms of all cost parameters. The simulation of the proposed circuit verifies the correctness of the circuit.
Bangladesh J. Sci. Ind. Res.53(3), 199-204, 2018
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